Welcome to The Logic Design Lab! Solved

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Lab 6: Peripheral Components: VGA, Mouse, and Dual FPGA
Prof. Chun-Yi Lee
Lab 6 Outline
Lab 6 Rules
Lab 6 Submission Requirements
Source codes and testbenches
Please follow the templates EXACTLY
We will test your codes by TAs’ testbenches
Lab 6 report
Please submit your report in a single PDF file
Please draw the block diagrams and state transition diagrams of your designs
Please explain your designs in detail
Please list the contributions of each team member clearly
Please explain how you test your design
What you have learned from Lab 6
Basic Questions

Basic FPGA Demonstration 1
Advanced Questions

Please design a simple FPGA-to-FPGA communication protocol The protocol is required to fulfill the following requirements:
Use the Handshaking protocol described below to send a number from a Master FPGA to a Slave FPGA
[Master -> Slave] Request
[Slave -> Master] ACK
[Master -> Slave] Send data (number)
Your design should be demonstrable in an observable speed so that TAs can know whether your design is correct or not Your design should be stable and should avoid signal loss

Button Control
Communication Process
The whole communicate process is designed as below:

PMOD Reference Diagram

The Slot Machine
The slot machine will run in an upward direction as you press Start (↑), and in a downward direction as you press Start (↓)
Press Reset to reset the machine
Remember to add debounce and one-pulse circuits to your buttons
The moving behavior of each digit should be the same that in the sample code
The slot machined should be able to be played again without pressing Reset
Start Start
The Car
Please refer to another slide deck for the details.
Make sure your car can run on the track correctly.
Use ultrasonic sensor to detect the distance.
If distance < 40cm, stop the car.
We will have two tracks.
In the basic track, we only care about its correctness.
In the bonus track, we will test its correctness and speed.


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